Я строю счетчик с асинхронной нагрузкой в VHDL. Когда я нажимаю кнопку (которая должна загружать данные в счетчик), она не будет увеличивать данные, но будет выглядеть так: если счетчик отображает 10 -> 1, 11-> 2 и т. Д.
Он работает хорошо, когда я нажимаю кнопку несколько раз, но если я оставил кнопку некоторое время, в следующий раз, когда я нажму, она не будет работать нормально.
Мой счетчик:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity countfeed is
Port ( Clock : in STD_LOGIC;
Num_out : out STD_LOGIC_VECTOR (15 downto 0);
ECU : in STD_LOGIC;
ALoad: in STD_LOGIC;
data : in STD_LOGIC_VECTOR(15 downto 0);
ECD : in STD_LOGIC);
end countfeed;
architecture Behavioral of countfeed is
signal count : STD_LOGIC_VECTOR(15 downto 0) := X"0000";
begin
Num_out <= count;
process(Clock,ALoad)
begin
if(ALoad = '1') then
count <= data;
elsif(rising_edge(Clock)) then
if(ECU = '1') then
if(count(3 downto 0) = X"9") then
count(3 downto 0) <= X"0";
count(7 downto 4) <= count(7 downto 4) + 1;
else
count(3 downto 0) <= count(3 downto 0) + 1;
end if;
if(count(7 downto 0) = X"59") then
count(7 downto 0) <= X"00";
count(11 downto 8) <= count(11 downto 8) + 1;
end if;
if(count(11 downto 0) = X"959") then
count(11 downto 0) <= X"000";
count(15 downto 12) <= count(15 downto 12) + 1;
end if;
if(count(15 downto 0) = X"9959") then
count(15 downto 0) <= X"0000";
end if;
elsif(ECD = '1') then
if(count(3 downto 0) = X"0") then
if(count(15 downto 4) /= X"0") then
count(3 downto 0) <= X"9";
count(7 downto 4) <= count(7 downto 4) - 1;
if(count(7 downto 4) = X"0") then
if(count(15 downto 8) /= X"0") then
count(7 downto 4) <= X"5";
count(11 downto 8) <= count(11 downto 8) - 1;
if(count(11 downto 8) = X"0") then
if(count(15 downto 12) /= X"0") then
count(11 downto 8) <= X"9";
count(15 downto 12) <= count(15 downto 12) - 1;
end if;
end if;
end if;
end if;
end if;
else
count(3 downto 0) <= count(3 downto 0) - 1;
end if;
end if;
end if;
end process;
end Behavioral;
Моя обработка данных (где bS - кнопка, disp_n вывод счетчика, данные - данные для загрузки:
process(bS)
begin
if(rising_edge(bS)) then
data(15 downto 8) <= disp_n(15 downto 8);
if(disp_n(7 downto 0) = X"59") then
data(7 downto 0) <= X"00";
elsif(disp_n(3 downto 0) = X"9") then
data(3 downto 0) <= X"0";
data(7 downto 4) <= disp_n(7 downto 4) + 1;
else
data(3 downto 0) <= disp_n(3 downto 0) + 1;
end if;
end if;
end process;
Нагрузка:
ALoad <= bS;
верхний уровень:
architecture Behavioral of toplevel is
Component ClockDivider is...
Component BCD is...
Component DebouncerC is...
Component edge_det is...
Component countfeed is
Port ( Clock : in STD_LOGIC;
Num_out : out STD_LOGIC_VECTOR (15 downto 0);
ECU : in STD_LOGIC;
ALoad: in STD_LOGIC;
data: in STD_LOGIC_VECTOR(15 downto 0);
ECD: in STD_LOGIC);
end Component;
signal bSS,bS,bM : STD_LOGIC; --Debounced buttons
signal clk1s : STD_LOGIC; -- 1 Hz Clock
signal ECU,ECD : STD_LOGIC; -- Enable Count Up/Down
signal Reset : STD_LOGIC; -- Reset
signal disp_n: STD_LOGIC_VECTOR(15 downto 0);
signal ALoad: STD_LOGIC;
signal data: STD_LOGIC_VECTOR(15 downto 0);
signal btS,btM: STD_LOGIC;
signal dataS: STD_LOGIC_VECTOR(15 downto 0);
begin
--Execution Unit--
E0: ClockDivider port map( Clock => Clock, ClockDiv => clk1s);
E1: BCD port map( Number => disp_n, Clock => Clock, Anod => Anod, Segment => seg);
E2: DebouncerC port map( Clock => Clock, Button_in => StartStop, Button_out => bSS);
E3: DebouncerC port map( Clock => Clock, Button_in => Seconds, Button_out => bS);
E4: DebouncerC port map( Clock => Clock, Button_in => Minutes, Button_out => bM);
E5: Reset <= bS and bM;
E6: countfeed port map(Clock => clk1s, Num_out => disp_n,ECU => ECU,
ECD => ECD,ALoad => ALoad, data => data);
E7: edge_det port map (Clock => Clock, Signal_in => bS, Signal_out => btS);
E8: edge_det port map (Clock => Clock, Signal_in => bM, Signal_out => btM);
ALoad <= btS or btM;
process(bS)
begin
if(rising_edge(bS)) then
data(15 downto 8) <= disp_n(15 downto 8);
if(disp_n(7 downto 0) = X"59") then
data(7 downto 0) <= X"00";
elsif(disp_n(3 downto 0) = X"9") then
data(3 downto 0) <= X"0";
data(7 downto 4) <= disp_n(7 downto 4) + 1;
else
data(3 downto 0) <= disp_n(3 downto 0) + 1;
end if;
end if;
end process;
process(bSS)
begin
if(rising_edge(bSS)) then
ECU <= not ECU;
end if;
end process;
end Behavioral;